[text text=(31337_62622482229413, `Unlike an AND gate, when the 'Enable' pin is [F], the switch doesn't output [F], it outputs nothing at all.`) size=22 y=-120]
[text text=(31337_80836475394613, `This allows their outputs to share wires without short-circuiting as long as at most 1 switch outputs something at any point`) size=22 y=-80]
[text text=(31337_42664577834105, `Which means the lower circuit is subtly wrong, with both switches outputting [Z] when the inputs both are [F]`) size=22 y=-40]

[table size=25 y=40 spacing_x=4 spacing_y=4 x=-400]
(31337_15534865654723, `Input 0`),        "[F]",  "[T]",   "[F]",  "[T]"
(31337_17025412277453, `Input 1`),        "[F]",  "[F]",  "[T]",   "[T]"
(31337_59092390409834, `Desired output`), "[F]",  "[T]",   "[T]",   "[F]"
[/table]
[text bold text=(31337_52307576546100, `Upper circuit/XOR`) size=22 y=120 x=-400]

[table size=25 y=40 spacing_x=4 spacing_y=4 x=300]
(31337_15534865654723, `Input 0`),        "[F]",  "[T]",   "[F]",  "[T]"
(31337_17025412277453, `Input 1`),        "[F]",  "[F]",  "[T]",   "[T]"
(31337_47029050705615, `Incorrect output`), "[F]",  "[T]",   "[T]",   "[Z]"
[/table]
[text bold text=(31337_16488212881433, `Lower circuit`) size=22 y=120 x=300]